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CeNSE provides a general furnace, annealing furnace, doping furnaces and oxidation furnace. The furnaces are used for a variety of tasks including:

The growth of oxidation layers

High and low temperature anneals

Spin and glass doping

Diffusion anneals

H2/D2 passivation anneals.

These furnaces can be found in room 365 ASTeCC building.

Lindberg Blue Manual

Thermal oxidation

In microfabrication, thermal oxidation is a way to produce a thin layer of oxide (usually silicon dioxide) on the surface of a wafer (semiconductor). The technique forces an oxidizing agent to diffuse into the wafer at high temperature and react with it. The rate of oxide growth is often predicted by the Deal-Grove model. Thermal oxidation may be applied to different materials, but this article will only consider oxidation of silicon substrates to produce silicon dioxide.

Oxidation technology

Most thermal oxidation is performed in furnaces, at temperatures between 800 and 1200°C. A single furnace accepts many wafers at the same time, in a specially designed quartz rack (called a "boat"). Historically, the boat entered the oxidation chamber from the side (this design is called "horizontal"), and held the wafers vertically, beside each other. However, many modern designs hold the wafers horizontally, above and below each other, and load them into the oxidation chamber from below.

Vertical furnaces stand higher than horizontal furnaces, so they may not fit into some microfabrication facilities. However, they help to prevent dust contamination. Unlike horizontal furnaces, in which falling dust can contaminate any wafer, vertical furnaces only allow it to fall on the top wafer in the boat.

Vertical furnaces also eliminate an issue that plagued horizontal furnaces, uniformity of grown oxide across the wafer. Horizontal furnaces typically have convection currents inside the tube which causes the bottom of the tube to be slightly colder than the top of the tube. As the wafers lie vertically in the tube the convection and the temperature gradient with it causes the top of the wafer to have a thicker oxide than the bottom of the wafer. Vertical furnaces solve this problem by having wafer sitting horizontally, and then having the gas flow in the furnace flowing from top to bottom, significantly dampening any thermal convections.

Vertical furnaces also allow the use of load locks to purge the wafers with nitrogen before oxidation to limit the growth of native oxide on the Si surface.

Oxide quality

Wet oxidation is preferred to dry oxidation for growing thick oxides, because of the higher growth rate. However, fast oxidation leaves more dangling bonds at the silicon interface, which produce quantum states for electrons and allow current to leak along the interface. (This is called a "dirty" interface.) Wet oxidation also yields a lower-density oxide, with lower dielectric strength.

The long time required to grow a thick oxide in dry oxidation makes this process impractical. Thick oxides are usually grown with a long wet oxidation bracketed by short dry ones (a dry-wet-dry cycle). The beginning and ending dry oxidations produce films of high-quality oxide at the outer and inner surfaces of the oxide layer, respectively.

Mobile metal ions can degrade performance of MOSFETs (sodium is of particular concern). However, chlorine can immobilize sodium by forming sodium chloride. Chlorine is often introduced by adding hydrogen chloride or trichloroethylene to the oxidizing medium. Its presence also increases the rate of oxidation.

Other notes

Thermal oxidation can be performed on selected areas of a wafer, and blocked on others. Areas which are not to be oxidized are covered with a film of silicon nitride, which blocks diffusion of oxygen and water vapor. The nitride is removed after oxidation is complete. This process cannot produce sharp features, because lateral (parallel to the surface) diffusion of oxidant molecules under the nitride mask causes the oxide to protrude into the masked area.

Because impurities dissolve differently in silicon and oxide, a growing oxide will selectively take up or reject dopants. This redistribution is governed by the segregation coefficient, which determines how strongly the oxide absorbs or rejects the dopant, and the diffusivity.

The orientation of the silicon crystal affects oxidation. A <100> wafer (see Miller indices) oxidizes more slowly than a <111> wafer, but produces an electrically cleaner oxide interface.

Thermal oxidation of any variety produces a higher-quality oxide, with a much cleaner interface, than chemical vapor deposition of oxide. However, the high temperatures that it requires restrict its usability. For instance, in MOSFET processes, thermal oxidation is never performed after the doping for the source and drain terminals is performed, because it would disturb the placement of the dopants.

Furnace annealing

Furnace annealing is a process used in semiconductor device fabrication which consist of heating multiple semiconductor wafers in order to affect their electrical properties. Heat treatments are designed for different effects. Wafers can be heated in order to activate dopants, change film to film or film to wafer substrate interfaces, densify deposited films, change states of grown films, repair damage from implants, move dopants or drive dopants from one film into another or from a film into the wafer substrate.

Furnace anneals may be integrated into other furnace processing steps, such as oxidations, or may be processed on their own.

Furnace anneals are performed by equipment especially built to heat semiconductor wafers. Furnaces are capable of processing lots of wafers at a time but each process can last between several hours and a day.

Increasingly, furnace anneals are being supplanted by Rapid Thermal Anneal (RTA) or Rapid Thermal Processing (RTP). The reason for this is the relatively long thermal cycles of furnaces causes dopants that are being actived, especially boron, to diffuse farther than is intended. RTP or RTA fixes this by having thermal cycles for each wafer that is of the order of minutes rather than hours for furnace anneals.


In semiconductor production, doping refers to the process of intentionally introducing impurities into an extremely pure (also referred to as intrinsic) semiconductor in order to change its electrical properties. The impurities are dependent upon the type of semiconductor. Lightly and moderately doped semiconductors are referred to as extrinsic. A semiconductor which is doped to such high levels that it acts more like a conductor than a semiconductor is called degenerate.

Some dopants are generally added as the (usually silicon) boule is grown, giving each wafer an almost uniform initial doping. To define circuit elements, selected areas (typically controlled by photolithography)[1] are further doped by such processes as diffusion[2] and ion implantation, the latter method being more popular in large production runs due to its better controllability.

The number of dopant atoms needed to create a difference in the ability of a semiconductor to conduct is very small. Where a comparatively small number of dopant atoms are added (of the order of 1 every 100,000,000 atoms) then the doping is said to be low, or light. Where many more are added (of the order of 1 in 10,000) then the doping is referred to as heavy, or high. This is often shown as n+ for n-type dopant or p+ for p-type doping. A more detailed description of the mechanism of doping can be found in the article on semiconductors.

Dopant elements

For the group IV semiconductors such as silicon, germanium, and silicon carbide, the most common dopants are group III or group V elements. (Group number refers to the Roman numerals of the columns in the periodic table of the elements.) Boron, arsenic, phosphorus and occasionally gallium are used to dope silicon. Boron is the p-type dopant of choice for silicon integrated circuit production, since it diffuses at a rate which makes junction depths easily controllable. Phosphorus is typically used for bulk doping of silicon wafers, while arsenic is used to diffuse junctions, since it diffuses more slowly than phosphorus and is thus more controllable.

By doping pure silicon with group V elements such as phosphorus, extra valence electrons are added which become unbonded from individual atom (UTC) and allow the compound to be electrically conductive, n-type semiconductor. Doping with group III elements, such as boron, which are missing the fourth valence electron creates "broken bonds", or holes, in the silicon lattice that are free to move. This is electrically conductive, p-type semiconductor. In this context then, a group V element is said to behave as an electron donor, and a group III element as an acceptor.


In most cases, many types of impurity will be present. If an equal number of donors and acceptors are present in the semiconductor, the extra core electrons provided by the former will be used to satisfy the broken bonds due to the latter, so that doping produces no free carriers of either type. This phenomenon is known as compensation, and occurs at the p-n junction in the vast majority of semiconductor devices. Partial compensation, where donors outnumber acceptors or vice-versa, allows device makers to repeatedly reverse the type of a given portion of the material by applying successively higher doses of dopants.

Although compensation can be used to increase or decrease the number of donors or acceptors, the electron and hole mobility is always decreased by compensation because mobility is affected by the sum of the donor and acceptor ions.

"Thermal oxidation." Wikipedia, The Free Encyclopedia. 31 Jan 2008, 07:08 UTC. Wikimedia Foundation, Inc. 13 Feb 2008 <>.

"Furnace anneal." Wikipedia, The Free Encyclopedia. 17 Sep 2007, 04:13 UTC. Wikimedia Foundation, Inc. 13 Feb 2008 <>.

"Doping (semiconductor)." Wikipedia, The Free Encyclopedia. 5 Feb 2008, 11:51 UTC. Wikimedia Foundation, Inc. 13 Feb 2008 <>.